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080121: SMC highlights PV, LED, and packaging materials
Ed’s Threads
Musings by Ed Korczynski on January 21, 2008

[Happy Birthday, Martin Luther King, Jr.!]

SMC highlights PV, LED, and packaging materials
Last week saw hundreds of microelectronics industry executives gather at ISS and SMC. The conventional forecasts for semiconductor manufacturing equipment and materials have been covered by previous WaferNEWS stories. SMC showed truly amazing perspective on new electronic materials markets of gigantic scales like photo-voltaics, high-efficiency lighting, and advanced 3D and WLP packages.

Solar is hotter than the sun these days, and Craig Hunter of Applied Materials provided a great overview of the whole market and his company’s leading position in offering turn-key fabs. The photo shows an Applied Materials’ SunFab PECVD 5.7 and those really are full size people standing next to a multi-chamber deposition system for PV on huge glass panels.

The global market in 2007 for PV panels was reportedly 4.8 GW, up ~50% from 2006. The current approximate cost to install a rooftop solar PV system is US$0.25-0.30/kWhr (absent incentives). However, nearly all PV manufacturers show near-term roadmaps to cut PV fab costs in half, and there are additional innovations possible in installation of modules, so it seems likely that price could drop to US$0.10-0.12/kWhr for large scale installations without any incentives. With demand forecasted to be extremely elastic to price, and with total global energy use growing at 2%/year on the scale of TeraWatts, PV will likely remain <1%>

The future of mega-fabs for PV panels includes integrated supply-chain campuses like the classic old Ford Rouge Plant in the 1920s. The thin-film PV fab of the future will be more efficient when if has a dedicated float glass plant for the substrate, a line for the thin-film encapsulant formation, and even packaging of the junction-boxes for the final modules. Each of these may be owned by a different company, but for economies of scale and manufacturing efficiency they’ll be adjacent to each other. Process gases such as hydrogen, silane, etc. account for ~17% of final panel costs, so long-considered innovations such as silane reclamation make be used in manufacturing In general it seems that the main scientific breakthroughs in PV have been made, and now the best engineers will win the race to fab profits. “People ask me all the time where I would locate a PV fab if I had to chose,” opined Hunter. “I think there’s a big opportunity for someone to put a factory in New Mexico, Arizona, or Texas.”

George Craford, CTO of Philips Lumileds Lighting Company, discussed the immanent “Revolution in lighting, high power LED technology.” As a demonstration, Buckingham Palace has been externally lit by LEDs at a cost of US$0.45/hr. The theoretical light output limit for an LED is 300 lumens/Watt, but the best in production is ~100 lumens/W, with 150 lumens/W on a roadmap. The plan is for high-power LEDs to be 1-3 per replacement bulb.

From the 1960s through the 1990s the LED brightness evolved at a fairly constant rate, though this was based on driving the same size chips with the same power. Starting ~10 years ago, the industry began to work with new packages to allow driving higher current-densities and resulting higher outputs for applications include automotive, flashlights, and projectors.

Why aren’t white LEDs everywhere? Quite simply the cost has been too high. For the same 1000 lumens output (60-100W incandescent bulb equivalent) the indandescent bulb costs $0.40, fluorescent tube $0.60, compact fluorescent $2, and white LED $10. Lumileds researchers seem confident that they can improve the basic Internal Quantum Efficiency (IQE) from ~45% today to ~90% tomorrow, and with higher drive current (700 mA to 2A) and lower chip and packaging costs the cost could be ~$1.

The energy savings with LEDs is truly impressive:

1000 lumens Input Power Energy cost/yr COO for 5 yrs
Incandescent 60W $48 $240
Fluorescent 20W $18 $90
Comp.Fluor. 14W $13 $85
White LED 6W $5 $26

Control of manufacturing is a concern since the variation in blue wavelength crossed with the yellow phosphor materials distribution creates variation in the color of white. The human eye is sensitive to subtle color variations and tight matching is needed for LEDs in the same room. Off-grid applications can be valuable using a single LED with a solar array or a bicycle generator…for example Light Up The World foundation has been installing LEDs around the world to allow children to be able to study schoolwork at night. China estimates that by changing to LED lighting it will save them as much electricity as the maximum planned output of the Three Gorges Dam. “They are going to dominate conventional illumination, it’s only a matter of time,” said Craford.

Packaging technology for ICs continues a steady evolution, with few examples more telling than the wirebonder. Wirebonders have periodically been considered as limited, but they evolve and now can go to 5 or even 8 levels of silicon useing new materials for dielectrics and interposers. FlipChip—which has been used almost exclusively for MCUs—is finally moving into the mainstream in combination with wirebonding and leadframes to allow for many efficient high-volume packages.. But SIP and SOC will continue to coexist in many possible variations using flipchip and wirebonding. PoP approaches also remain competitive, with variations using thinned silicon, recessed-cavities, and fan-in routing.

E.K.

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080111: Flood of used 200mm tools
Ed’s Threads 080111
Musings by Ed Korczynski on January 11, 2008

Flood of used 200mm tools
Semico Research, working with affiliated Semiconductor Partners, has released a new study of the near-term forecast for used 200mm wafer processing tools soon to flood the market. In addition to identifying companies that are likely to either purchase or sell a fab and their expansion or divestiture plans, this study includes five-year device forecasts by technology node and detailed wafer demand. The market for used equipment is expected to grow from $300 million in 2007 to more than $8 billion in 2009.

"As leading edge digital memory and logic manufacturers build 300mm fabs for process technologies of 65nm or less, this will obsolete their 200mm fabs at 130nm or 90nm and some of their 300mm fans at 90nm. Analog and mixed signal manufacturers will have a need for these fabs to meet for expansion to satisfy the growing analog, mixed signal, and RF markets," explained Morry Marshall, Partner, Strategic Technologies at Semiconductor Partners.

The number of used tools forecasted in this study may be estimated by considering the average selling prices (ASP), and this varies widely depending upon tool categories. Tom Cheyney’s well written recent ChipShots blog mentions the standard 10%-20% cost of new tools, which certainly has been the historic average. Unfortunately, we’re entering into a new era where the lessons from history may not hold.

The upper limit of used tool sales prices comes from unique specialty process tools, needed to expand capacity on existing lines, which are no longer sold new. Like a legendary musical instrument (e.g., Fender Stratocaster pre-CBS electric guitar, or Selmer Mark VI saxophone) with only so many made, any still working are highly functional, and if you’ve built your business using them you’re willing to pay a premium price to keep using them. In the last year, I have heard of rebuilt 150mm tools with warranties selling for >$1.5M. In some cases this could be >200% of what had been the new sales price.

The lower limit of used tool sales prices comes from mainstream memory and logic fabs lacking uniqueness in the toolset. Since the used-tool ASPs are primarily determined by the supply/demand balance, a supply glut can lead to what-the-market-will-bear prices below 10% of new. If a seller tries to hold out for a more "reasonable" price only to find no takers, the line has to be shutdown and sold "as is" for even less money.

A working fab is a proven thing. There is risk in shutting down, decontaminating, shipping, and re-setting up a line, but at least if you start with a working line you have some baseline reference. A shuttered fab is full of extra risk. Every process chamber must be re-checked and proven; every gas line feeding every tool is now suspect. How much is a shuttered line worth? About two years ago I spoke with the general manager of a Chinese fab about used 200mm toolsets and supply and demand. He told me that he’s routinely approached by people wanting to sell lines for ~US$50M, and he tells them to not bother him until the price drops to $25M.

So who might be buying used 200mm lines? The Semico report mentions the general truism that, "Production of some device types, such as discretes or MCUs, will not move forward appreciably to more advanced technology nodes." MEMS and discrete chips have been produced in recent years primarily on 150mm silicon wafers, but STMicroelectronics and Freescale now like 200mm silicon wafers for dedicated MEMS production. MCUs for appliances, automotives, and general industrial applications may be industry entry points for new IC fab companies based on China (and eventually India, after infrastructure issues are eventually resolved). Philips likes 200mm for integrated passives and MEMS for advanced packaging, primarily through "PASSI" branded passives integration. So there is certainly demand. But the lingering impression is that it won’t keep up with the supply glut, and it will be a classic "buyer’s market."

A recent example of this dynamic is Atmel's sale of the 200mm tools in its North Tynesides, UK fab last year. Atmel originally tried to sell the entire facility to a company that would keep the line running in the UK. Leading broker of fabs Colliers ATREG was retained to try to make a deal happen with the constraint that there was "no opportunity to acquire the tools separately." At the end, TSMC bought the tools only for $82M, with expectation that they will add capacity in Shanghai, China.

The Semico report forecasts the value of available used equipment for the next four years (2008-2012) to be $5.4B, $8.2B, $6.5B, and $3.9B, for a total of $24B in value. For ASPs of ~15% of new prices, the corresponding equivalent in new tool sales value would be $160B. A rough guesstimate from these numbers would seem to imply >100 fabs with ~20k wspm at 0.13-0.25μm minimum linewidth capacity will flood the market over the next four years. For relative scale, with the SEMI Silicon Manufacturers’ Group forecasting ~10B square inches of silicon being processed for semiconductors each year, this translates into >800 fully loaded fabs globally running wafers in 200mm-equivalents.

With 20-40 extra fabs for sale each year, it seems certain that used tool ASPs will have to drop and the revenues to sellers and brokers may not be as high as forecast. Regardless of ultimate pricing, all of these tools under consideration are highly productive (most are still currently cranking out production) and most will eventually find a home.

The industry may be able to use most of these tools to manufacture MEMS, discrete devices, integrated passives, and silicon interposers. If a used 200mm tool glut floods over to mainstream CMOS, however, then it could permanently disrupt global pricing for MCUs and other logic ICs.

—E.K.

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080111: Flood of used 200mm tools

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Anonymous ajfoyt in ATex said...

Ed,

Would be interesting to see if the cost of tool install normally @ 5-10% of new tool price becomes the dominant cost to fab capital expenditures. Using that math and your 15% of new capital cost being the average used tool price what will the component cost be for refurb/reconfiguration? Who's looking at this total market opportunity? Interesting, based on the layoffs announced by AMAT today? Who's going to configure all of these refurbs and who will start them up?

Tue Jan 15, 08:45:00 PM PST  

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080101: 2007 odds and ends
Ed’s Threads 080101
Musings by Ed Korczynski on January 01, 2008

2007 odds and ends
High-k (HK) and metal-gates (MG) for CMOS transistors are real and here now, with Intel deciding on HK-first but MG-last for process integration. What is the temperature limit for MG processing such that the HK remains amorphous in this flow, and how many other elements are alloyed with hafnium and oxygen in the final film? IBM and SEMATECH and most of the rest of the world seem to be working on HKMG-first integration.

IBM in the US has sold 45nm bulk silicon manufacturing technology to SMIC in the P.R. China. I remember being in Shanghai in 1995 when people in China talked about getting 250nm (then “quarter micron”) technology from US companies, and it was then deemed too powerful to let go; now such technology sells for pennies on the ever depreciating dollar. Meanwhile, Intel is reportedly still on schedule to open a 90nm logic fab in China.

Indian semiconductor fab plans seem to lack the political will needed to become real. An anonymous comment left on my prior blog entry about India's plans for its "Fab City" stated, “so far nothing happened. no electrical infrastructure and no water pipes. government is only fooling to promote the nearby real estate ventures.” Informal discussions with Indian expatiates at IEDM last month seem to confirm this perspective. The official Web site for the government now lists "Nano-Tech Silicon India Ltd." (NTSI) as a solar fab to be built -- just seven months ago the government insisted that it would soon be a 20K wafer starts/month IC fab. Despite delays in infrastructure, companies seem willing to try to start-up photovoltaic fab lines in India along with the rest of the world (scroll halfway down the page to see the list of promised PV projects).

With the price of oil nearly at US $100/barrel (less in other currencies), most of the world has decided that solar energy might be worth investing in for a while. Applied Materials continued to acquire its way into OEM dominance, while Oerlikon did a spin-out and acquired a top executive. (I recently talked shop with top PV execs at both AMAT and Oerlikon about their respective strategies.)

Meanwhile, subsystems suppliers like Advanced Energy and Edwards have shifted resources to follow the PV money. Nanosolar printed its first CIGS thin-film PV cells at its new line in San Jose, CA. HelioVolt announced its first fab to produce printed CIGS cells. Dick Swanson of SunPower gave a great presentation at IEDM (Session 14.1) on development of silicon solar cells, showing that manufacturing efficiency increases should cut final installed PV system costs 50% by 2012.

Never trust a semiconductor process engineer who isn't a great cook. It's all about recipes either way, and I've come to the unreasonable conclusion that all good process people like to play in the kitchen too. Baking holiday cookies reminds me of systematic yield losses and design-for-manufacturing (DFM) pattern-centric solutions -- in both cases you need uniform distribution of features across the surface to ensure uniformity. The more narrow the process window, the more you have to control repeatability across the cookie sheet (or silicon wafer).

From the wonderful people at the Annals of Improbable Research we get the yearly Ig Nobel Awards . My personal favorite award for 2007 -- due to love of Toscanini's Ice Cream -- is the award in chemistry given to Mayu Yamamoto of Japan's International Medical Center, for developing a way to extract vanillin from cow dung (REFERENCE: "Novel Production Method for Plant Polyphenol from Livestock Excrement Using Subcritical Water Reaction," Mayu Yamamoto, International Medical Center of Japan.) Moreover, kudos to Toscanini’s for creating a new ice cream flavor and introducing it at the Ig Nobel ceremony, called "Yum-a-Moto Vanilla Twist."

Speaking of twists, 2007 was also another year of consolidation across various equipment/process segments (Lam/SEZ, KLA-Tencor/Therma-Wave/FabSolve, Aixtron/Nanoinstruments, MKS/Yield Dynamics, and TEL/Epion to name just a few). Notable deals happened in the intersection of litho and design (Cadence/Invarium, Blaze/Aprio, and in late 2006 ASML/Brion), as well as test (Teradyne/Nextest, Verigy/Inovys, Rudolph/Applied Precision). Also, private equity had a major presence in the industry, particularly early in the year, in deals for Edwards' vacuum/equipment biz, backend firms STATS ChipPAC, UTAC, and UK dep/etch firm STS. And even AMD looked overseas for much-needed external funds.

One surprising end to 2007 was the Republic of Lakotah formally withdrawing from all treaties with the United States of America, and reclaiming sovereignty as a nation and over its traditional grounds. Maybe someone can build an IC fab there.

After Motorola's advanced fabs became Freescale and then moved R&D to France and then New York, and after Texas Instruments decided to end R&D at 45nm, and after the Silicon Valley Technology Center (Cypress’ former R&D fab) bought the Advanced Technology Development Fab, it’s time to pause for a moment of silence. SEMATECH in Texas is dead; long live SEMATECH in New York!

— E.K.

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Ed's Threads is the weekly web-log of SST Sr. Technical Editor Ed Korczynski's musings on the topics of semiconductor manufacturing technology and business. Ed received a degree in materials science and engineering from MIT in 1984, and after process development and integration work in fabs, he held applications, marketing, and business development roles at OEMs. Ed won editorial awards from ASBPE, including interviews with Gordon Moore and Jim Morgan, and is not lacking for opinions.