Ed’s Threads 070720
Musings by Ed Korczynski on July 20, 2007
HK+MG metrology technology
With High-k (HK) dielectrics and metal-gates (MG) now being ramped into CMOS production at Intel and IBM, much of the excitement at the just finished SEMICON West 2007 in San Francisco centered around manufacturing technologies needed for these new materials. ASM and Imago sponsored seminars on these topics, and much of the discussion in panel discussions sponsored by
Praxair and
DuPont centered on the challenges of working with these new materials. In particular, setting up affordable in-line metrology for these new ultra-thin materials will be tricky.
Recently departed SEMATECH Fellow Alain Diebold,
now a Professor at the U. Albany, provided an overview of the need for HK metrology in a breakfast seminar sponsored by Imago. For Hf
xSi1-xO2, both x=0.25 and 0.75 are stable structures, which may be regarded as Hf substituted in an SiO2 matrix and Si substituted in an HfO2 matrix, respectively. HK layers in production will likely be just 3-5 atomic layers thick. Since improving hole mobility is inherently difficult, one first possible application of finFETs is to integrate PMOS finFETs with planar nFETs at the beginning of the 32nm node. “We need atom-by-atom characterization and metrology for fins in R&D; today, not later,” informed Diebold.
The
U. of North Texas—previously renowned for its jazz music scholarships—inherited an old TI fab and received $11M in funding to invest in cutting-edge metrology tools. TEM can resolve sub-angstroms spatially, but chemical resolution is limited to ~1%. Secondary ion mass spectroscopy (SIMS) provides sub-parts-per-million chemical resolution, but lacks special resolution. Local-electrode atomic probe (LEAP) systems sold by Imago Scientific Instruments provide ~2Å spatial resolution and ~E18 chemical resolution, using full-width-half-maximum (WFHM) measurements of a calculated concentration curves to calculate thickness. Approximately 80nm diameter silicon samples are cut from wafers using a dual-beam FIB, and 6-7 samples can be prepared in an hour by a skilled FIB operator. Dopant “snow-plow” effects in diffusion, quantum well structures, and buried interface roughness can all be analyzed to calibrate in-line metrology techniques. LEAP reconstructions of this HK stack as-deposited and post-anneal show 0.5nm of Hf and O diffusion.
Since LEAP provides excellent resolution but is inherently destructive and relatively slow, it is ideal for R&D; but cannot be used for in-line production control. Still, LEAP and other lab techniques are vital for calibration of production control approaches. “The type of information that you get from R&D helps you set up your in-line metrology, and the two work hand-in-glove, as Howard Huff used to say,” reminded Diebold. With HKMG now ramping in production, there’s a crop of new in-line metrology tools available.
ReVera provides
XPS tools that can resolve thickness, composition, profile, and chemical bonding states information from thin dielectric films, and claims customers are using the tool to measure gate-dielectrics and HK storage for memory chips. XPS can measure all elements heavier than He for any film or material up to 100Å thick in any part of the process flow.
After one year of
promoting it for high-volume metrology applications such as HK+MG, Metryx claims sales have doubled for its mass monitoring tool, which has sufficient resolution to detect differences in the atomic masses between silicon (28 g/mole) and hafnium (178 g/mole) in hafnium-silicate ALD layers. The company claims wins with customers for process control applications in volume fabs, typically measuring the masses of >60 wafers/hr.
Metrosol’s vacuum ultra-violet (VUV) spectroscopic reflectometer was designed specifically
to handle in-line metrology of ultra-thin dielectrics. Two manually-loaded chambers have been in use for over two years at customers, one for hafnium-silicon-oxide films and one for nano-imprint lithography (NIL). The first five beta units of the fully-automated tool will be ready this September. The purchase cost is claimed to be 1/2 to 2/3 of an x-ray or extended range ellipsometer, and typical throughputs are 2x-10x of such systems. (
Click for WaferNEWS' interview with CEO Kevin Fahey.)
Since thin-film metrology is pointless if you can’t deposit the material in the first place, the readiness of the industry to begin volume production of chips using HK gate-stacks has been shown by ASM officially releasing its
Pulsar ALD chamber for the company’s Polygon cluster-tool. ASM likes to term its ALD variant atomic-layer CVD (ALCVD), though the process and hardware seem quite similar to other single-wafer ALD technologies.
Gate-first HK stacks use a capping layer such as lanthanum-oxide to form a dielectric dipole in the vertical dimension. This cap oxide is hygroscopic, so the stack should be formed without breaking vacuum to eliminate exposure to water vapor. This is just one of the critical integration issues which must be controlled in the formation of HK+MG CMOS transistors. With atomically thin films and complex interdependencies in integration, the “make versus buy” decision for 2
nd-tier fabs will almost certainly fall to buying it, because it just cannot be easily made. “Even if you reverse-engineer the chip, you can’t discern the integration scheme,” explained Glen Wilk, product manager for transistor products at ASM.
Don’t worry if all of this sounds almost too difficult to manage. Professional materials scientists have been working on the research for decades, and we’re now in the era of engineering specific solutions to known problems. Stay tuned for yearly breakthroughs.
—E.K.
Labels: ALCVD, ALD, high-k, HK+MG, LEAP, manufacturing, metrology, XPS
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070720: HK+MG metrology technology
