Ed’s Threads 061027
Musings by Ed Korczynski on 27 October 2006
Applied HKMG ready when you are
The IEEE and Applied Materials co-sponsored a
one day seminar on High-K dielectrics and Metal Gates (HKMG) yesterday in San Jose. Researchers from AMD, Freescale, IBM, Toshiba, Xilinx, and SEMATECH presented their experiences with integrating HKMG materials into CMOS transistors, and showed that these newer materials are ready for low-standby power (LSTP) IC applications. Within the last few years, the industry has converged on Halfnium-silicon-oxynidride (HfSiON) for the dielectric, and tantalum alloys for the NMOS MG. Expect to see the PMOS electrode material—likely either a titanium or tungsten alloy—emerge within the next 6 months.
Just down the street from the Winchester Mystery House in San Jose is the ostentatious
nouveau-riche shopping mall they call Santana Row (even though it has no connection to Carlos). In the middle of Santana Row you find the glaring excess of the Hotel Valencia, with its faux-pan-asian-post-modern-hyper-cool-a-go-go interior design. Some of the beautiful people who normally frequent the ultra-lounges were understandably confused to see socially awkward technologists blightening the space. They had no way of knowing that we were there to discuss the latest chip technologies inside the iPods, camera-phones, and colored wall lights that make the ultra-lounges so ‘ultra.’
Consumer applications now drive IC manufacturing technology development, unlike past eras driven by government or corporate buying. New chips must meet ever tighter market windows with huge initial production volumes. New manufacturing technology brings risks, yet manufacturing high volumes of complex consumer products makes you risk-averse, so the global industry only changes technology when it sees no way other way forward.
Tom St. Dennis, Senior Vice President, General Manager Etch, Cleans, Front End and Implant Products Business Groups for Applied Materials, in an interview with SST stated that Applied has been supporting HKMG for 45nm node LSTP applications at customer sites for at least a year. St. Dennis stated, “However, there’s another dimension to all of this: cost. It used to be technology at any cost. But with consumers driving the industry today, more than ever we’re sensitized to bring our products forward with a reasonable cost target.”
Unit process development has already solved many HKMG physics-based issues such as carrier scattering, metal work-function control, and device structure scaling. Gary Miner, CTO for the Front End Products Group of Applied Materials informed SST editors that, “When we started this there were some pretty fundamental issues such as getting band-edge targets that hold at temperature. Now the integration continues across all applications.”
The bottom line is that HKMG CMOS chips are already here; Samsung is already using a halfnium-based dielectric with MG for DRAM, and has announced plans to use the materials for pseudo-SONOS Flash memory by 2008. The consensus is that high performance (HP) logic will probably not use HKMG until the 32nm node. The processes and manufacturing hardware for both HK and MG could have been deployed by now, but strain and other engineering tricks extended the capability of SiON/Poly-Si materials, which delayed the tough integration work now occurring.
Basic
R&D; of high-k dielectrics and metal gates for transistors was first reported at Materials Research Society meetings well over 10 years ago. Companies like Applied Materials have developed capable tools for the introduction of these newer materials into high-volume chip manufacturing. Design tools still need to be modified, and a sufficient number of wafers must be run to establish variability values for any EDA tools. The decision to implement HKMG—as is almost always the current case—now simply hinges on the cost of manufacturing the new ‘ultra.’
– E.K.
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061027: Applied HKMG ready when you are
